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The Binary Subtractor is another type of combinational arithmetic circuit that is the opposite of the Binary Adder we looked at in a previous tutorial. As their name implies, aBinary Subtractor is a decision making circuit that subtracts two binary numbers from each other, for example, X – Y to find the resulting difference between the two numbers.

Unlike the Binary Adder which produces a SUM and a CARRY bit when two binary numbers are added together, the binary subtractor produces a DIFFERENCE, D by using a BORROW bit, B from the previous column. Then obviously, the operation of subtraction is the opposite to that of addition.

We learnt from our maths lessons at school that the minus sign, "–" is used for a subtraction calculation, and when one number is subtracted from another, a borrow is required if the subtrahend is greater than the minuend. Consider the simple subtraction of the two denary (base 10) numbers below.

   123X (Minuend)
– 78Y (Subtrahend)
45DIFFERENCE 
 

We can not directly subtract 8 from 3 in the first column as 8 is greater than 3, so we have to borrow a 10, the base number, from the next column and add it to the minuend to produce 13 minus 8. This "borrowed" 10 is then return back to the subtrahend of the next column once the difference is found. Simple school math's, borrow a 10 if needed, find the difference and return the borrow.

The subtraction of one binary number from another is exactly the same idea as that for subtracting two decimal numbers but as the binary number system is a Base-2 numbering system which uses "0" and "1" as its two independent digits, large binary numbers which are to be subtracted from each other are therefore represented in terms of "0's" and "1's".

Binary Subtraction

Binary Subtraction can take many forms but the rules for subtraction are the same whichever process you use. As binary notation only has two digits, subtracting a "0" from a "0" or a "1" leaves the result unchanged as 0-0 = 0 and 1-0 = 1. Subtracting a "1" from a "1" results in a "0", but subtracting a "1" from a "0" requires a borrow. In other words 0 - 1 requires a borrow.

Binary Subtraction of Two Bits

011(borrow)1→ 0
– 0– 0– 1– 1
0101
 

For the simple 1-bit subtraction problem above, if the borrow bit is ignored the result of their binary subtraction resembles that of an Exclusive-OR Gate. To prevent any confusion in this tutorial between a binary subtractor input labelled, B and the resulting borrow bit output from the binary subtractor also being labelled, B, we will label the two input bits as X for the minuend and Yfor the subtrahend. Then the resulting truth table is the difference between the two input bits of a single binary subtractor is given as:

2-input Exclusive-OR Gate

SymbolTruth Table
2-input exclusive-or gate
2-input Ex-OR Gate
YXQ
000
011
101
110
 

As with the Binary Adder, the difference between the two digits is only a "1" when these two inputs are not equal as given by the Ex-OR expression. However, we need an additional output to produce the borrow bit when input A = 0 and B = 1. Unfortunately there are no standard logic gates that will produce an output for this particular combination of X and Y inputs.

But we know that an AND Gate produces an output "1" when both of its inputs X and Y are "1" (HIGH) so if we use an inverter or NOT Gate to complement the input X before it is fed to the AND gate, we can produce the required borrow output when X = 0 and Y = 1 as shown below.

 

binary subtractor borrow generation

 

Then by combining the Exclusive-OR gate with the NOT-AND combination results in a simple digital binary subtractor circuit known commonly as the Half Subtractor as shown.

A Half Subtractor Circuit

A half subtractor is a logical circuit that performs a subtraction operation on two binary digits. The half subtractor produces a sum and a borrow bit for the next stage.

Half Subtractor with Borrow-out

half subtractor block diagram

 
SymbolTruth Table
half subtractor circuitYXDIFFERENCEBORROW
0000
0110
1011
1100

From the truth table of the half subtractor we can see that the DIFFERENCE (D) output is the result of the Exclusive-OR gate and the Borrow-out (Bout) is the result of the NOT-AND combination. Then the Boolean expression for a half subtractor is as follows.

For the DIFFERENCE bit

D = X XOR Y = X     Y

For the BORROW bit

B = not-X AND Y = X.Y

 

If we compare the Boolean expressions of the half subtractor with a half adder, we can see that the two expressions for the SUM (adder) and DIFFERENCE (subtractor) are exactly the same and so they should be because of the Exclusive-OR gate function. The two Boolean expressions for the binary subtractor BORROW is also very similar to that for the adders CARRY. Then all that is needed to convert a half adder to a half subtractor is the inversion of the minuend input X.

One major disadvantage of the Half Subtractor circuit when used as a binary subtractor, is that there is no provision for a "Borrow-in" from the previous circuit when subtracting multiple data bits from each other. Then we need to produce what is called a "full binary subtractor" circuit to take into account this borrow-in input from a previous circuit.

A Full Binary Subtractor Circuit

The main difference between the Full Subtractor and the previous Half Subtractor circuit is that a full subtractor has three inputs. The two single bit data inputs X (minuend) and Y (subtrahend) the same as before plus an additional Borrow-in (B-in) input to receive the borrow generated by the subtraction process from a previous stage as shown below.

Full Subtractor Block Diagram

full subtractor block diagram

 

Then the combinational circuit of a "full subtractor" performs the operation of subtraction on three binary bits producing outputs for the difference D and borrow B-out. Just like the binary adder circuit, the full subtractor can also be thought of as two half subtractors connected together, with the first half subtractor passing its borrow to the second half subtractor as follows.

Full Subtractor Logic Diagram

full subtractor logic diagram

 

As the full subtractor circuit above represents two half subtractors cascaded together, the truth table for the full subtractor will have eight different input combinations as there are three input variables, the data bits and the Borrow-inBIN input. Also includes the difference output, D and the Borrow-out, BOUT bit.

Full Subtractor Truth Table

SymbolTruth Table
full subtractor circuitB-inYXDiff.B-out
00000
00110
01011
01100
10011
10100
11001
11111
 

Then the Boolean expression for a full subtractor is as follows.

For the DIFFERENCE (D) bit

D = (X.Y.BIN) + (X.Y.BIN) + (X.Y.BIN) + (X.Y.BIN)

which can be simplified too:

D = (X XOR Y) XOR BIN = (X     Y)     BIN

For the BORROW OUT (BOUT) bit

BOUT = (X.Y.BIN) + (X.Y.BIN) + (X.Y.BIN) + (X.Y.BIN)

which will also simplify too:

BOUT = X AND Y OR (X XOR Y)BIN = X.Y + (X     Y)BIN

An n-bit Binary Subtractor

As with the binary adder, we can also have n number of 1-bit full binary subtractor connected or "cascaded" together to subtract two parallel n-bit numbers from each other. For example two 4-bit binary numbers. We said before that the only difference between a full adder and a full subtractor was the inversion of one of the inputs.

So by using an n-bit adder and n number of inverters (NOT Gates), the process of subtraction becomes an addition as we can use two's complement notation on all the bits in the subtrahend and setting the carry input of the least significant bit to a logic "1" (HIGH).

Binary Subtractor using 2's Complement

4-bit binary adder subtractor

 

Then we can use a 4-bit full-adder ICs such as the 74LS283 and CD4008 to perform subtraction simply by using two's complement on the subtrahend, B inputs as X – Y is the same as saying, X + (-Y) which equals X plus the two's complement of Y.

If we wanted to use the 4-bit adder for addition once again, all we would need to do is set the carry-in (CIN) input LOW at logic "0". Because we can use the 4-bit adder IC such as the 74LS83 or 74LS283 as a full-adder or a full-subtractor they are available as a single adder/subtractor circuit with a single control input for selecting between the two operations.


Another common and very useful combinational logic circuit is that of the Digital Comparator circuit. Digital or Binary Comparators are made up from standard AND, NOR and NOT gates that compare the digital signals present at their input terminals and produce an output depending upon the condition of those inputs.

For example, along with being able to add and subtract binary numbers we need to be able to compare them and determine whether the value of input A is greater than, smaller than or equal to the value at input B etc. The digital comparator accomplishes this using several logic gates that operate on the principles of Boolean Algebra. There are two main types of Digital Comparatoravailable and these are.

  • 1. Identity Comparator – an Identity Comparator is a digital comparator that has only one output terminal for when A = B either "HIGH"  A = B = 1 or "LOW"  A = B = 0
  • 2. Magnitude Comparator – a Magnitude Comparator is a digital comparator which has three output terminals, one each for equality, A = B  greater than, A > B  and less than A < B

The purpose of a Digital Comparator is to compare a set of variables or unknown numbers, for example A (A1, A2, A3, …. An, etc) against that of a constant or unknown value such as B (B1, B2, B3, …. Bn, etc) and produce an output condition or flag depending upon the result of the comparison. For example, a magnitude comparator of two 1-bits, (A and B) inputs would produce the following three output conditions when compared to each other.

digital comparator

 

Which means:  A is greater than B,  A is equal to B,  and A is less than B

This is useful if we want to compare two variables and want to produce an output when any of the above three conditions are achieved. For example, produce an output from a counter when a certain count number is reached. Consider the simple 1-bit comparator below.

1-bit Digital Comparator Circuit

digital comparator circuit

 

Then the operation of a 1-bit digital comparator is given in the following Truth Table.

Digital Comparator Truth Table

InputsOutputs
BAA > BA = BA < B
00010
01100
10001
11010

You may notice two distinct features about the comparator from the above truth table. Firstly, the circuit does not distinguish between either two "0" or two "1"'s as an output A = B is produced when they are both equal, either A = B = "0" or A = B = "1". Secondly, the output condition for A = Bresembles that of a commonly available logic gate, the Exclusive-NOR or Ex-NOR function (equivalence) on each of the n-bits giving: Q =  B

Digital comparators actually use Exclusive-NOR gates within their design for comparing their respective pairs of bits. When we are comparing two binary or BCD values or variables against each other, we are comparing the "magnitude" of these values, a logic "0" against a logic "1" which is where the term Magnitude Comparator comes from.

As well as comparing individual bits, we can design larger bit comparators by cascading together nof these and produce a n-bit comparator just as we did for the n-bit adder in the previous tutorial. Multi-bit comparators can be constructed to compare whole binary or BCD words to produce an output if one word is larger, equal to or less than the other.

A very good example of this is the 4-bit Magnitude Comparator. Here, two 4-bit words ("nibbles") are compared to each other to produce the relevant output with one word connected to inputs Aand the other to be compared against connected to input B as shown below.

4-bit Magnitude Comparator

magnitude comparator

 

Some commercially available digital comparators such as the TTL 74LS85 or CMOS 4063 4-bit magnitude comparator have additional input terminals that allow more individual comparators to be "cascaded" together to compare words larger than 4-bits with magnitude comparators of "n"-bits being produced. These cascading inputs are connected directly to the corresponding outputs of the previous comparator as shown to compare 8, 16 or even 32-bit words.

8-bit Word Comparator

8-bit magnitude comparator

 

When comparing large binary or BCD numbers like the example above, to save time the comparator starts by comparing the highest-order bit (MSB) first. If equality exists, A = B then it compares the next lowest bit and so on until it reaches the lowest-order bit, (LSB). If equality still exists then the two numbers are defined as being equal.

If inequality is found, either A > B or A < B the relationship between the two numbers is determined and the comparison between any additional lower order bits stops. Digital Comparator are used widely in Analogue-to-Digital converters, (ADC) and Arithmetic Logic Units, (ALU) to perform a variety of arithmetic operations.


Another common and very useful combinational logic circuit which can be constructed using just a few basic logic gates allowing it to add together two or more binary numbers is the Binary Adder. A basic Binary Adder circuit can be made from standard AND and Ex-OR gates allowing us to "add" together two single bit binary numbers, A and B.

The addition of these two digits produces an output called the SUM of the addition and a second output called the CARRY or Carry-out, ( COUT ) bit according to the rules for binary addition. One of the main uses for the Binary Adder is in arithmetic and counting circuits. Consider the simple addition of the two denary (base 10) numbers below.

   123A(Augend)
+ 789   B   (Addend)
912SUM 
 

From our maths lessons at school, we learnt that each number column is added together starting from the right hand side and that each digit has a weighted value depending upon its position within the columns. When each column is added together a carry is generated if the result is greater or equal to 10, the base number. This carry is then added to the result of the addition of the next column to the left and so on, simple school math's addition, add the numbers and carry.

The adding of binary numbers is exactly the same idea as that for adding together decimal numbers but this time a carry is only generated when the result in any column is greater or equal to "2", the base number of binary. In other words 1 + 1 creates a carry.

Binary Addition

Binary Addition follows these same basic rules as for the denary addition above except in binary there are only two digits with the largest digit being "1". So when adding binary numbers, a carry out is generated when the "SUM" equals or is greater than two (1+1) and this becomes a "CARRY" bit for any subsequent addition being passed over to the next column for addition and so on. Consider the single bit addition below.

Binary Addition of Two Bits

0011
+ 0+ 1+ 0+ 1
011(carry) 1←0
 

When the two single bits, A and B are added together, the addition of "0 + 0", "0 + 1" and "1 + 0" results in either a "0" or a "1" until you get to the final column of "1 + 1" then the sum is equal to "2". But the number two does not exists in binary however, 2 in binary is equal to 10, in other words a zero for the sum plus an extra carry bit.

Then the operation of a simple adder requires two data inputs producing two outputs, the Sum (S) of the equation and a Carry (C) bit as shown.

Binary Adder Block Diagram

binary adder block diagram

 

For the simple 1-bit addition problem above, the resulting carry bit could be ignored but you may have noticed something else with regards to the addition of these two bits, the sum of their binary addition resembles that of an Exclusive-OR Gate. If we label the two bits as A and B then the resulting truth table is the sum of the two bits but without the final carry.

2-input Exclusive-OR Gate

SymbolTruth Table
2-input exclusive-or gate
2-input Ex-OR Gate
BAS
000
011
101
110
 

We can see from the truth table above, that an Exclusive-OR gate only produces an output "1" when either input is at logic "1", but not both the same as for the binary addition of the previous two bits. However in order to perform the addition of two numbers, microprocessors and electronic calculators require the extra carry bit to correctly calculate the equations so we need to rewrite the previous summation to include two-bits of output data as shown below.

00000101
+ 00+ 01+ 00+ 01
00010110
 

From the above equations we now know that an Exclusive-OR gate will only produce an output "1" when "EITHER" input is at logic "1", so we need an additional output to produce the carry bit when "BOTH" inputs A and B are at logic "1". One digital gate that fits the bill perfectly producing an output "1" when both of its inputs A and B are "1" (HIGH) is the standard AND Gate.

2-input AND Gate

SymbolTruth Table
2-input AND gate
2-input AND Gate
BAC
000
010
100
111
 

By combining the Exclusive-OR gate with the AND gate results in a simple digital binary adder circuit known commonly as the "Half Adder" circuit.

A Half Adder Circuit

A half adder is a logical circuit that performs an addition operation on two binary digits. The half adder produces a sum and a carry value which are both binary digits.

Half Adder Truth Table with Carry-Out

SymbolTruth Table
half adderBASUMCARRY
0000
0110
1010
1101

From the truth table of the half adder we can see that the SUM (S) output is the result of the Exclusive-OR gate and the Carry-out (Cout) is the result of the AND gate. Then the Boolean expression for a half adder is as follows.

For the SUM bit

SUM = A XOR B = A  B

For the CARRY bit

CARRY = A AND B = A.B

 

One major disadvantage of the Half Adder circuit when used as a binary adder, is that there is no provision for a "Carry-in" from the previous circuit when adding together multiple data bits.

For example, suppose we want to add together two 8-bit bytes of data, any resulting carry bit would need to be able to "ripple" or move across the bit patterns starting from the least significant bit (LSB). The most complicated operation the half adder can do is "1 + 1" but as the half adder has no carry input the resultant added value would be incorrect. One simple way to overcome this problem is to use a Full Adder type binary adder circuit.

A Full Adder Circuit

The main difference between the Full Adder and the previous Half Adder is that a full adder has three inputs. The same two single bit data inputs A and B as before plus an additional Carry-in (C-in) input to receive the carry from a previous stage as shown below.

Full Adder Block Diagram

full adder block diagram

 

Then the full adder is a logical circuit that performs an addition operation on three binary digits and just like the half adder, it also generates a carry out to the next addition column. Then a Carry-in is a possible carry from a less significant digit, while a Carry-out represents a carry to a more significant digit.

In many ways, the full adder can be thought of as two half adders connected together, with the first half adder passing its carry to the second half adder as shown.

Full Adder Logic Diagram

full adder logic diagram

 

As the full adder circuit above is basically two half adders connected together, the truth table for the full adder includes an additional column to take into account the Carry-inCIN input as well as the summed output, S and the Carry-out, COUT bit.

Full Adder Truth Table with Carry

SymbolTruth Table
full adderC-inBASumC-out
00000
00110
01010
01101
10010
10101
11001
11111

Then the Boolean expression for a full adder is as follows.

For the SUM (S) bit

SUM = (A XOR B) XOR Cin = (A  B)  Cin

For the CARRY-OUT (Cout) bit

CARRY-OUT = A AND B OR Cin(A XOR B) = A.B + Cin(A  B)

An n-bit Binary Adder

We have seen above that single 1-bit binary adders can be constructed from basic logic gates. But what if we wanted to add together two n-bit numbers, then n number of 1-bit full adders need to be connected or "cascaded" together to produce what is known as a Ripple Carry Adder.

A "ripple carry adder" is simply "n", 1-bit full adders cascaded together with each full adder representing a single weighted column in a long binary addition. It is called a ripple carry adder because the carry signals produce a "ripple" effect through the binary adder from right to left, (LSB to MSB).

For example, suppose we want to "add" together two 4-bit numbers, the two outputs of the first full adder will provide the first place digit sum (S) of the addition plus a carry-out bit that acts as the carry-in digit of the next binary adder.

The second binary adder in the chain also produces a summed output (the 2nd bit) plus another carry-out bit and we can keep adding more full adders to the combination to add larger numbers, linking the carry bit output from the first full binary adder to the next full adder, and so forth. An example of a 4-bit adder is given below.

A 4-bit Ripple Carry Adder

4 bit binary adder

 

One main disadvantage of "cascading" together 1-bit binary adders to add large binary numbers is that if inputs A and B change, the sum at its output will not be valid until any carry-input has "rippled" through every full adder in the chain because the MSB (most significant bit) of the sum has to wait for any changes from the carry input of the LSB (less significant bit). Consequently, there will be a finite delay before the output of the adder responds to any change in its inputs resulting in a accumulated delay.

When the size of the bits being added is not too large for example, 4 or 8 bits, or the summing speed of the adder is not important, this delay may not be important. However, when the size of the bits is larger for example 32 or 64 bits used in multi-bit adders, or summation is required at a very high clock speed, this delay may become prohibitively large with the addition processes not being completed correctly within one clock cycle.

This unwanted delay time is called Propagation delay. Also another problem called "overflow" occurs when an n-bit adder adds two parallel numbers together whose sum is greater than or equal to 2n

One solution is to generate the carry-input signals directly from the A and B inputs rather than using the ripple arrangement above. This then produces another type of binary adder circuit called a Carry Look Ahead Binary Adder where the speed of the parallel adder can be greatly improved using carry-look ahead logic.

The advantage of carry look ahead adders is that the length of time a carry look ahead adder needs in order to produce the correct SUM is independent of the number of data bits used in the operation, unlike the cycle time a parallel ripple adder needs to complete the SUM which is a function of the total number of bits in the addend.

4-bit full adder circuits with carry look ahead features are available as standard IC packages in the form of the TTL 4-bit binary adder 74LS83 or the 74LS283 and the CMOS 4008 which can add together two 4-bit binary numbers and generate a SUM and a CARRY output as shown.

74LS83 Logic Symbol

74ls83 logic symbol

Summary of Binary Adders

We have seen in this tutorial about Binary Adders that adder circuits can be used to "add" together two binary numbers producing a "carry-out". In its most basic form, adders can be made from connecting together an Exclusive-OR gate with an AND gate to produce a Half Adder circuit. Two half adders can the be combined to produce a Full Adder.

There are a number of 4-bit full-adder ICs available such as the 74LS283 and CD4008. which will add two 4-bit binary number and provide an additional input carry bit, as well as an output carry bit, so you can cascade them together to produce 8-bit, 12-bit, 16-bit, adders but the carry propagation delay can be a major issue in large n-bit ripple adders.


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